In voltage regulators dropout is defined as the input-output voltage differential at which the circuit ceases to regulate against further reductions in input voltage. A low dropout voltage is of maximum interest in battery-operated equipment where the supply voltage declines with time. First, a low dropout voltage means that less power is dissipated in the pass transistor so that efficiency is improved. Second, as the battery voltage declines with time, low dropout voltage means that a greater voltage decline can be tolerated before the battery must be replaced or recharged.
In the typical low dropout voltage regulator, using conventional IC construction, the pass transistor is constructed as a large area PNP lateral transistor. FIG. 1 is a schematic diagram of a typical low dropout IC voltage regulator. The circuit is typically manufactured using silicon epitaxial planar, PN junction isolated, construction which is well known in the art. The circuit receives a + input at terminal 10, referenced against ground terminal 11, and provides a regulated output at terminal 12. PNP pass transistor 13 has an area that is from 25 to several hundred times that of a minimum area device. The base of transistor 13 is driven by a common emitter NPN driver 14, which has a biasing resistor 15 connected between its base and emitter. This resistor sets the current flowing in transistor 17. Emitter resistor 16 degenerates the gain in transistor 14 and its collector current is set by source 38. Common collector NPN transistor 17 acts as an emitter follower that drives the base of transistor 14 through resistor 18. PNP transistor 19 acts as a bias level shifting emitter follower that drives the base of transistor 17. Current source 20 sets the emitter current in transistor 19. A differential amplifier (diff-amp) 21 forms the amplifier input stage. The current in transistors 22 and 23, which respectively form the noninverting and inverting inputs, are set by the current source 24. NPN transistors 25 and 26 form a current mirror load in input stage 21. Load input transistor 25 is diode connected and includes base resistor 27. Load output transistor 26 and the output of transistor 23 provides a single ended drive for the base of transistor 19. Transistor 26 also includes base resistor 28 and a frequency compensation network composed of resistor 29 and capacitor 30.
A conventional bandgap reference circuit 31 produces a temperature independent constant voltage which is connected to the base of transistor 22. This reference voltage is typically 1.25 volts. Resistors 32 and 33 form a voltage divider connected between output termnal 12 and ground. The divider tap, node 34, is connected to the base of transistor 23 to provide the regulator negative feedback which stabilizes the circuit operation. The output voltage at terminal 12 will be driven to that level, which results in the voltage at node 34 being equal to the reference voltage at the base of transistor 22. Since a high gain negative feedback loop is involved, the output voltage will be held constant regardless of changes in temperature, input voltage and regulator load current.
When a PNP transistor, such as element 13 goes into saturation, its construction is such that it will inject minority carriers into the IC chip N type epitaxial region. These carriers are collected by the P type isolation material and thereby flow into the chip substrate. This substrate current can cause voltage drops along the chip which can adversely affect adjacent active devices. Furthermore, this excessive substrate current is lost and contributes nothing to the output current. Thus, it only serves to heat the IC chip and represents a reduction in efficiency. Accordingly, a circuit action is incorporated into the structure to reduce or avoid saturation in transistor 13. This circuit action is designated a "sat catcher" and is accomplished by transistor 35 which operates in the following manner.
PNP transistor 35 has its emitter connected to the collector of transistor 13 and its base is connected to the base of transistor 13. Under normal operating conditions sat catcher 35 will be off. As transistor 13 approaches saturation, and its collector rises above its base, sat catcher 35 will turn on and supply current to the base of transistor 36, which will thereby conduct and pull the base of transistor 14 down which will reduce the drive to the base of transistor 13 which rises. When sat catcher 35 is off, during normal circuit operation, resistor 37 returns the base of transistor 36 to ground thereby turning it off. It can be seen that conduction in sat catcher 35 will clamp the collector of transistor 13 at a potential equal to V.sub.IN +V.sub.BE35 -V.sub.BE13. This means that the regulator dropout potential is increased from the V.sub.SAT of transistor 13 to the base to emitter potential differential between transistors 13 and 35 which, while higher than a V.sub.SAT, is still well below a V.sub.BE.
FIG. 2 is a graph showing the performance of the FIG. 1 circuit at 25.degree. C. Curve 39 is a plot of the V.sub.BE of transistor 13. Curve 40 shows a theoretical linear plot of 60 mv/decade which serves to show the departure of the V.sub.BE of transistor 13 from theoretical linearity, at the higher currents. Curve 41 is a plot of the V.sub.BE of transistor 35. The regulator dropout voltage would be curve 41 subtracted from curve 39. Clearly, at high currents, the V.sub.BE of transistor 13 dominates the dropout voltage.